Please use this identifier to cite or link to this item:
http://idr.mnit.ac.in/jspui/handle/123456789/539| Title: | Simulation and Performance Investigation of Double Gate Junctionless Transistor for Ultra-Low Power… |
| Authors: | Sharma, Shashank Sahu, Dr. Chitrakant |
| Issue Date: | 1-Aug-2019 |
| Publisher: | MNIT Jaipur |
| Gov't Doc #: | 2016PEV5392 |
| URI: | http://hdl.handle.net/123456789/539 |
| Appears in Collections: | Simulation and Performance Investigation of Double Gate Junctionless Transistor for Ultra-Low Power… |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 2016PEV5392- Shashank Sharma.pdf | 2016PEV5392- Shashank Sharma | 734.75 kB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.