Please use this identifier to cite or link to this item:
http://idr.mnit.ac.in/jspui/handle/123456789/509
Title: | Simulation-Based Study of High Performance Double Gated Fd-Soi Transistor for Ph Sensing Applications… |
Authors: | Kumar, Naveen Periasamy, Dr. C. |
Issue Date: | 1-Jul-2019 |
Publisher: | MNIT Jaipur |
Gov't Doc #: | 2017PEV5175 |
URI: | http://hdl.handle.net/123456789/509 |
Appears in Collections: | Simulation-Based Study of High Performance Double Gated Fd-Soi Transistor for Ph Sensing Applications… |
Files in This Item:
File | Description | Size | Format | |
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2017PEV5175- Naveen Kumar.pdf | 2017PEV5175- Naveen Kumar | 2.68 MB | Adobe PDF | View/Open |
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