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  2. M. Tech. Dissertation of MNIT Jaipur
  3. Electronics & Communication Engineering
  4. Emg Feature Extraction and Classification Implementation on FPGA…
Please use this identifier to cite or link to this item: http://idr.mnit.ac.in/jspui/handle/123456789/488
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dc.contributor.authorMeena, Chandrakanta-
dc.date.accessioned2020-03-09T05:06:00Z-
dc.date.available2020-03-09T05:06:00Z-
dc.date.issued2019-07-01-
dc.identifier.govdoc2017PEV5156-
dc.identifier.urihttp://hdl.handle.net/123456789/488-
dc.language.isoen_USen_US
dc.publisherMNIT Jaipuren_US
dc.titleEmg Feature Extraction and Classification Implementation on FPGA…en_US
dc.typeThesisen_US
dc.contributor.guideJoshi, Dr. Amit M.-
Appears in Collections:Emg Feature Extraction and Classification Implementation on FPGA…

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