Please use this identifier to cite or link to this item:
http://idr.mnit.ac.in/jspui/handle/123456789/167| Title: | On Efficient And Accurate Surrogate Models Of Leakage In CMOS Gated Circuits... |
| Authors: | Garg, Lokesh Professor, Dr. Vineet Sahula |
| Issue Date: | 1-May-2016 |
| Publisher: | MNIT Jaipur |
| Gov't Doc #: | ID - 2010REC101 |
| URI: | http://hdl.handle.net/123456789/167 |
| Appears in Collections: | On Efficient And Accurate Surrogate Models Of Leakage In CMOS Gated Circuits... |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 2010REC101 - Lokesh Garg.pdf | 2010REC101 - Lokesh Garg | 3.75 MB | Adobe PDF | View/Open |
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